Renesas Electronics /R7FA6M1AD /ADC120 /ADCSR

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Interpret as ADCSR

15 1211 87 43 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0DBLANS0 (Reserved)Reserved 0 (0)GBADIE 0 (0)DBLE 0 (0)EXTRG 0 (0)TRGE 0 (Reserved)Reserved 0 (Reserved)Reserved 0 (Reserved)Reserved 0 (00)ADCS 0 (0)ADST

GBADIE=0, EXTRG=0, ADCS=00, ADST=0, DBLE=0, TRGE=0

Description

A/D Control Register

Fields

DBLANS

Double Trigger Channel Select These bits select one analog input channel for double triggered operation. The setting is only effective while double trigger mode is selected.

Reserved

This bit is read as 0. The write value should be 0.

GBADIE

Group B Scan End Interrupt Enable

0 (0): Disables ADC120_GBADI interrupt generation upon group B scan completion.

1 (1): Enables ADC120_GBADI interrupt generation upon group B scan completion.

DBLE

Double Trigger Mode Select

0 (0): Double trigger mode non-selection

1 (1): Double trigger mode selection

EXTRG

Trigger Select

0 (0): A/D conversion is started by the synchronous trigger (ELC).

1 (1): A/D conversion is started by the asynchronous trigger (ADTRG0).

TRGE

Trigger Start Enable

0 (0): Disables A/D conversion to be started by the synchronous or asynchronous trigger.

1 (1): Enables A/D conversion to be started by the synchronous or asynchronous trigger.

Reserved

This bit is read as 0. The write value should be 0.

Reserved

This bit is read as 0. The write value should be 0.

Reserved

This bit is read as 0. The write value should be 0.

ADCS

Scan Mode Select

0 (00): Single scan mode

1 (01): Group scan mode

2 (10): Continuous scan mode

3 (11): Setting prohibited

ADST

A/D Conversion Start

0 (0): Stops A/D conversion process.

1 (1): Starts A/D conversion process.

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